ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK

Required properties (phy (parent) node):
 - compatible : should be one of the listed compatibles:
	* "rockchip,rk3228-usb2phy"
	* "rockchip,rk3328-usb2phy"
	* "rockchip,rk3366-usb2phy"
	* "rockchip,rk3399-usb2phy"
	* "rockchip,rv1108-usb2phy"
 - reg : the address offset of grf for usb-phy configuration.
 - #clock-cells : should be 0.
 - clock-output-names : specify the 480m output clock name.

Optional properties:
 - clocks : phandle + phy specifier pair, for the input clock of phy.
 - clock-names : input clock name of phy, must be "phyclk".
 - assigned-clocks : phandle of usb 480m clock.
 - assigned-clock-parents : parent of usb 480m clock, select between
		 usb-phy output 480m and xin24m.
		 Refer to clk/clock-bindings.txt for generic clock
		 consumer properties.
 - rockchip,usbgrf : phandle to the syscon managing the "usb general
		 register files". When set driver will request its
		 phandle as one companion-grf for some special SoCs
		 (e.g RV1108).

Required nodes : a sub-node is required for each port the phy provides.
		 The sub-node name is used to identify host or otg port,
		 and shall be the following entries:
	* "otg-port" : the name of otg port.
	* "host-port" : the name of host port.

Required properties (port (child) node):
 - #phy-cells : must be 0. See ./phy-bindings.txt for details.
 - interrupts : specify an interrupt for each entry in interrupt-names.
 - interrupt-names : a list which should be one of the following cases:
	Regular case:
	* "otg-id" : for the otg id interrupt.
	* "otg-bvalid" : for the otg vbus interrupt.
	* "linestate" : for the host/otg linestate interrupt.
	Some SoCs use one interrupt with the above muxed together, so for these
	* "otg-mux" : otg-port interrupt, which mux otg-id/otg-bvalid/linestate
		to one.

Optional properties:
 - phy-supply : phandle to a regulator that provides power to VBUS.
		See ./phy-bindings.txt for details.

Example:

grf: syscon@ff770000 {
	compatible = "rockchip,rk3366-grf", "syscon", "simple-mfd";
	#address-cells = <1>;
	#size-cells = <1>;

...

	u2phy: usb2-phy@700 {
		compatible = "rockchip,rk3366-usb2phy";
		reg = <0x700 0x2c>;
		#clock-cells = <0>;
		clock-output-names = "sclk_otgphy0_480m";

		u2phy_otg: otg-port {
			#phy-cells = <0>;
			interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "otg-id", "otg-bvalid", "linestate";
		};

		u2phy_host: host-port {
			#phy-cells = <0>;
			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "linestate";
		};
	};
};
